This invention relates generally to fabrication of printed circuit boards (PCBs), and more particularly, to the fabrication of printed circuit boards for integrated circuits (ICs) that operate at high frequencies and require close coupled capacitors to reduce switching noise levels.
As is generally known in the art, high speed integrated circuits frequently require what are known as "decoupling" capacitors to reduce the local voltage variations (known as "switching noise") created by the operation of transistors. Typically, the capacitors (caps) are mounted either on the PCB where ever space is available, or directly under the ICs to conserve valuable board space and increase the density of electrical components on the PCB.
As is also well-known in the art, the "electrical distance" between these "decoupling" capacitors and the IC package must be made as small as possible to decrease the time required for the charge in the capacitor to reach the IC. This problem becomes worse as the speed of the IC increases because the amount of time that an electric charge in the capacitor takes to flow into the IC may become longer than the time needed in the IC to completely switch from one state into another. Thus, in this art capacitors must be placed directly beneath the IC packages. With capacitors placed beneath the IC package, the typical distance between the package leads and capacitor is minimized because the entire periphery of the IC package is as close as possible to the capacitor located in the middle of the leads.
With typical integrated circuit packages, such as Plastic Leaded Chip Carriers (PLCCs), Leaded Chip Carriers (LDCCs), or Small Outline J Bends (SOJs) the height or distance between the bottom of the package and the top of the printed circuit board is sufficient for a capacitor to be placed on the PCB without approaching too near the bottom of the IC package. As is well known, one reason why a gap is required between the capacitor and the bottom of the IC package, is that to properly clean the PCB underneath the packages, one must have enough space for fluids, such as cleaning solutions, to flow freely. This cleaning procedure removes the remains of soldering residues, such as flux.
Another well known problem is that the maximum height of IC packages on the board must be reduced (i.e., must have a lower height profile). This is due to the desire to put components on both sides of a board and still have sufficient space between boards in a computer system. Thus, there is a need to reduce the height of IC packages, and to have capacitors located beneath the IC package. Further, as the operating frequencies of ICs increase with subsequent generations of technology, the need for larger effective decoupling capacitances becomes more critical. Larger capacitances typically require physically larger capacitors and thus require more space beneath the IC package to place capacitors on the PCB.
Prior art problems with capacitor placement underneath the ICs results in placement of capacitors and other components along side of the IC. Such an action results in other problems including space and density considerations, electrical requirements, board thickness limits and device speed limits. Capacitor placement issues aren't limited to devices that require high chip densities and have space considerations. There are additional electrical considerations that also benefit from having capacitors placed beneath the IC package. Typically individual IC leads that require what is known as "bypass" or "decoupling" relative to one another are often on opposite sides of the IC package. Thus, if the capacitor was positioned at one side of the IC, then whichever one of the leads that was on the same side as the capacitor would have a better and shorter connection to the capacitor than the lead that was on the other side of the package. Thus there would be an uneven and unbalanced bypass capacitance.
Second, the overall length of the traces on the PCB (i.e., the path length of the electrical charge going from the capacitor to the IC) through two leads which are on opposite sides of the package is greatly increased by positioning the capacitors on the side of the IC package, rather than underneath, and this increase in trace length consequently increases the total inductance of the circuit. As IC speeds increase, this inductance becomes a greater problem because it can easily rise to a level which effectively disconnects the capacitor from the IC during the time period in which the currents are flowing. Thus the capacitor becomes effectively useless (known as decoupled).
The third problem is that current designs frequently require increased levels of capacitance (or the same capacitance value with a lower effective series resistance and inductance) and this results in a need for increased sized capacitors. Thus the ability to continue to place capacitors directly underneath ICs packaged in the newer low profile packages is critical for speed and space reasons.
In the prior art, it was also known to put capacitors and other components on the opposite side of the board from the active devices. This method places the capacitor electrically closer to the IC than positioning the capacitor next to the IC package since the PCBs are typically about 0.064 inches thick. Opposite side capacitor placement eliminates many of the above noted problems of placing capacitors beside the ICs, such as increased path length and unbalanced electrical paths. However, this is no longer an acceptable solution in the art because the advent of what is known as "surface mounting" (as opposed to the older method of "thru-hole" type dual in line package (DIP) type mounting), makes it possible and desirable to put active components on both sides of the PCB. With dual sided PCBs, one board can be made to do the work of two, and thus the size of the overall system is reduced by half, as well as having increased potential operating frequencies due to shorter overall electrical path lengths.
Under similar circumstances requiring close coupling capacitors, the previous solution applied for cases where inadequate space existed beneath the IC package for the capacitors, was to mount the caps directly on top of the IC Package. In order to do this the IC Package required specially designed metal pads on the package top to attach to the leads of the capacitor. This frequently required that the IC Package be comprised of an expensive ceramic. However, the extremely high cost of these specially designed ceramic packages is not acceptable for low cost memories such as DRAMs. Further, the fact that the height of the IC package was increased by the addition of the caps on top of the IC package makes this method undesirable.
Thus, the prior art has two distinct problems with capacitors and low profile IC packages. The space between the IC package and the PCB is decreasing because of height requirements, and the need for larger capacitances and thus physically larger capacitors beneath the IC package on the PCB requires more space between the IC package and the PCB. This results in a conflict in the needs of the prior art for capacitors on PCBs immediately beneath IC packages.